The present invention is related to field programmable integrated circuits, especially Field Programmable Gate Arrays (FPGAs), and more particularly, to floating gate MOS transistors used as switching elements in an FPGA.
Typically, an FPGA has an array of logic elements and wiring interconnections with thousands, or even tens of thousands, of programmable interconnects so that the FPGA can be configured by the user into an integrated circuit with defined functions. Each programmable interconnect, or switch, can connect two circuit nodes in the integrated circuit to make (or break) a wiring interconnection or to set the function or functions of a logic element.
FPGAs use either memory cells or antifuses for the programmable interconnect. Memory cells are reprogrammable and antifuses are programmable only once. A new memory-type of programmable interconnect is disclosed in a patent application, U.S. patent application Ser. No. 08/270,714, entitled, "A GENERAL PURPOSE, NON-VOLATILE REPROGRAMMABLE SWITCH," filed Jul. 5, 1994 by Robert J. Lipp, Richard D. Freeman, Robert U. Broze, John M. Caywood, and Joseph G. Nolan, III, and assigned to the present assignee. In the FPGA described in the patent application, a non-volatile reprogrammable transistor memory (NVM) cell is used to provide a general purpose switching element to randomly interconnect FPGA wiring and circuit elements. Basically an NVM cell has an MOS transistor with a floating gate which may be charged and/or discharged. Charging and/or discharging the floating gate provides for the non-volatile programmability feature of NVM technologies.
In an FPGA, indeed, in any integrated circuit, it is important that the elements of the FPGA be as compact as possible for an efficient layout of the circuit and be as easily manufactured as possible. The present invention is directed toward highly compact cells of one of the programmable interconnects described in the patent application above. An efficient array of such interconnects, each of which is selectively programmable, is achieved. The manufacture of the interconnect cell array is straightforward in terms of present day semiconductor manufacturing technology.